| [ ] | 1.1 Standalone MM is Used | Traditional SMM and combined SMM/DXE modules aren’t supported, use Standalone MM instead. SMM-specific file types/DEPEX aren’t dispatched/evaluated. | No Traditional SMM |
| [ ] | 1.2 A Priori Driver Dispatch Is Not Used | Remove A Priori sections. Patina dispatches in FFS listed order. Use DEPEX (optionally with empty/stub protocols) to control dependencies. | A Priori Driver Dispatch Is Not Allowed |
| [ ] | 1.3 All DXE Dispatchable Modules Have Page Aligned Sections | All DXE images (including C-based drivers) must have ≥ 4 KB section alignment. ARM64 DXE_RUNTIME_DRIVER images must use 64 KB. Set linker flags accordingly (e.g., /ALIGN:0x1000 or -z common-page-size=0x1000). | Driver Section Alignment |
| [ ] | 1.4 CpuDxe is Removed From the Flash File | CPU Arch & memory-attribute protocols are owned by Patina Core. Don’t include CpuDxe (and on ARM64, don’t include ArmGicDxe). Use a separate MP Services driver (e.g., MpDxe on x64). | CpuDxe Is No Longer Used |
| [ ] | 2.1 Resource Descriptor HOB v2 is Used | Use Resource Descriptor HOB v2 (with exactly one valid cacheability attribute). v1 is ignored. Allowed: UC, WC, WT, WB, WP. UCE is prohibited. | Resource Descriptor HOB v2 |
| [ ] | 2.2 All MMIO & Reserved Regions Are Described | Provide v2 Resource Descriptor HOBs for all memory resources, including MMIO and reserved regions. | MMIO & Reserved Regions |
| [ ] | 2.3 No Overlap in HOB Reported Resources | There must be no overlaps between Resource Descriptor HOB v2 entries. Split or remove duplicates so each address range is described by exactly one HOB. | Overlapping HOBs Prohibited |
| [ ] | 2.4 Page 0 is Not Allocated | Do not allocate page 0. Patina unmaps it to catch null dereferences. | No Memory Allocation HOB for Page 0 |
| [ ] | 3.1 No Memory Allocations/Deallocations After Exit Boot Servicesd | After ExitBootServices(), the memory map must not change. Ensure all alloc/free happens before EBS callbacks. | EBS Allocations Not Allowed |
| [ ] | 3.2 All DXE Code Used in the Platform Supports Native Address Width | Patina allocates top‑down, so addresses may be >4 GB. All code must store pointers in native-width types (not 32‑bit ints). | Native Address Width |
| [ ] | 3.3 ConnectController() Is Called Explicitly | Patina does not auto‑call ConnectController() during StartImage(). Drivers/platforms must call it for any handles they create/modify. | ConnectController() Must Be Called |